The DESN community at TechWorks, together with its FPGA Front Runners group, recently conducted the FPGA Usage Survey 2025 to understand better how developers, engineers, and researchers use FPGAs in their work. The study explored everything from design tools and workflows to application domains and project challenges, helping to identify current trends and opportunities across the FPGA landscape.
Alpinum Consulting supported this initiative and continues to collaborate with DESN and TechWorks to advance verification practices and strengthen knowledge sharing through joint forums, specialist groups, and technical events.
Survey Context
The survey, conducted via SurveyMonkey, invited design and verification engineers to share details of their FPGA usage, tools, and challenges. The collected data, compiled as FPGA Usage Survey Results 2025, now forms the basis of this analysis.
The results highlight how UK teams are applying FPGAs across multiple industries, the evolving balance between traditional and advanced verification approaches, and the ongoing need to maintain and develop engineering expertise within small, specialised teams.
Who Took Part and What They Use
The survey drew responses from 22 participants across the UK. Of these, 77.27% reported using AMD/Xilinx devices, while 40.91% use Altera devices. Meanwhile, modest but notable adoption was recorded for Lattice (22.73%), Microchip (27.27%), and Efinix (13.64%), showing the gradual diversification of FPGA supply chains.
Figure 1 illustrates this distribution, with AMD/Xilinx devices clearly leading adoption, followed by Altera. The presence of smaller vendors such as Lattice, Microchip, and Efinix reflects the expanding diversity of technology options available to UK designers, particularly as teams seek flexibility and supply resilience. Typical FPGA families included Kintex-7, Artix-7, Stratix-10, and Cyclone, demonstrating a balance between high performance and cost efficiency. This combination illustrates the UK’s continued strength in complex, high-value but resource-conscious designs, especially in industrial, aerospace, and research-driven applications.
Figure 1: FPGA Vendor Usage Among DESN Survey Participants
AMD/Xilinx remains the dominant platform, with Altera, Lattice, Microchip, and Efinix showing meaningful secondary adoption, underscoring a maturing and diversified FPGA ecosystem.
Project Scale and Engineering Effort
Survey data show that most UK FPGA projects fall within the 10,000 to 500,000 LUT-FF pair range, representing nearly 60% of all reported designs. A smaller proportion of respondents handle more complex projects in the 1 M–5 M range (13.64%), while very large-scale designs above 5 M gates remain rare. These figures highlight a defining feature of the UK design landscape: compact, agile engineering teams delivering sophisticated programmable solutions with high efficiency and strong cross-disciplinary collaboration.
Figure 2 illustrates this distribution clearly. Mid-range FPGA designs (10 k – 500 k LUT-FF pairs) are by far the most prevalent, whereas only a few projects exceed the million-gate threshold. These findings suggest that while engineers continue to manage technically demanding workloads, most FPGA developments remain optimised for smaller teams and faster delivery cycles.
Figure 2: Typical FPGA Project Scale Reported by Respondents
Most projects fall within the 10 k – 500 k LUT-FF range, confirming that mid-sized FPGA designs dominate UK development activity. Few respondents report working on 1M –5M-gate designs, while very large-scale projects above 5M gates remain uncommon.
However, this also highlights recurring challenges in verification effort, resource scalability, and toolchain management, particularly for FPGA-SoC integration and in-system debug.
Application Areas
The data shows that FPGAs continue to play a central role in a wide range of UK industries. The most prominent application areas include aerospace and defence, industrial systems, scientific instruments, video and image processing, and ASIC or SoC prototyping for high-performance computing.
Figure 3 highlights this distribution, showing aerospace and defence as the leading sector for FPGA use, followed by industrial and prototyping applications. Consumer electronics, scientific instrumentation, and video/image processing also represent strong areas of activity, demonstrating the adaptability of FPGAs across both commercial and research domains.
These findings confirm that FPGAs remain vital for mission-critical and performance-intensive systems where reliability, flexibility, and low latency are essential design priorities.
Figure 3 (a): FPGA Application Areas Reported by Respondents
Aerospace and defence dominate FPGA use, followed by industrial, prototyping, and scientific applications, reflecting the broad reach of programmable logic in UK engineering.
Figure 3 (b): Percentage Distribution of FPGA Application Areas
Tabulated responses showing the detailed percentage share of each application area. Aerospace & Defence (57.89 %) leads, followed by Prototyping (42.11 %), Industrial (31.58 %), and Video & Image Processing (42.11 %), confirming a diverse and balanced deployment across sectors.
Tools, Languages, and Verification Approaches
Design and verification teams across the UK continue to use a diverse mix of hardware description and scripting languages. VHDL remains dominant, reported by 73.68% of respondents, while Verilog, SystemVerilog, and TCL each hold 42.11% usage. Many teams combine these to maintain compatibility with legacy code while gradually shifting to modern verification environments. Python is used by 31.58%, primarily for build automation and testing workflows, while smaller groups adopt MATLAB and Perl (around 10%) for analysis and tool integration. Figure 4 illustrates this mix, highlighting how UK respondents balance traditional HDL workflows with a steady move toward scripted, reusable automation practices.
Figure 4: FPGA Design and Scripting Language Usage
VHDL remains the most widely used HDL among UK respondents, followed by Verilog, SystemVerilog, and TCL. Python is increasingly used for automation and build scripting, while MATLAB and Perl serve minor roles in analysis and integration.
In terms of verification strategies, simulation with directed tests remains the most common technique, selected by 84.21% of participants. In-system testing and manual RTL code reviews are still heavily relied upon, both used by over two-thirds of respondents (68.42%). Functional coverage and constrained-random simulation are gaining traction, though their uptake remains under 50%. Assertion-based verification was reported by just 26.32%, and formal equivalence checking trails behind at 15.79%. These findings suggest that while traditional, simulation-heavy methods dominate, more advanced formal and assertion-based flows remain niche. Figure 5 provides a breakdown of verification methods currently in use.
Figure 5: FPGA Verification Methods Used by Respondents
Directed-test simulation dominates current verification practice, with in-system testing and manual RTL reviews used by over two-thirds of respondents. Coverage-based, assertion-based, and formal methods are growing steadily but remain less common.
Prototyping and Design Challenges
Respondents identified several recurring challenges in FPGA prototyping. The most common issues were designing and building hardware with the latest FPGA devices (52.63%), implementing external IP (42.11%), and maintaining hardware visibility and debug (42.11%). Other frequent concerns included partitioning large designs across multiple FPGAs (31.58%) and managing high-speed multiplexing between FPGAs (26.32%).
These results highlight the increasing complexity of FPGA-based prototyping, where visibility, integration, and scalability continue to stretch engineering resources. As shown in Figure 6, visibility and debug limitations remain among the most persistent barriers, closely followed by hardware integration and multi-FPGA partitioning difficulties.
Figure 6 (a): FPGA Prototyping Challenges Identified by UK Respondents
Designing and building hardware with the latest FPGA devices is the most common challenge, followed by external IP integration and issues with hardware visibility and debug. Partitioning large designs and managing high-speed inter-FPGA connections remain notable secondary difficulties.
Figure 6 (b): FPGA Prototyping Challenges Identified by UK Respondents (Tabulated View)
Design Flow and Bottlenecks
Survey respondents provided insight into how engineering time is distributed across FPGA development phases. On average, teams spend around one quarter of total project effort on design specification and RTL coding, while verification remains the single most significant activity at 28%. Additional effort is typically allocated to timing analysis and closure (7%), integration and debug of embedded software (14%), and in-lab hardware testing (7%). These figures highlight the diverse and multidisciplinary nature of FPGA projects, extending well beyond core design tasks.
Figure 7 illustrates this distribution, showing that verification dominates total project effort while design, integration, and debug tasks each contribute meaningful portions of engineering time. The findings emphasise the importance of structured methodology planning, reusable verification frameworks, and early collaboration between hardware and software teams to achieve predictable timelines and robust design outcomes.
Figure 7 (a): FPGA Project Time Distribution Across Development Phases
Survey respondents reported spending the largest share of total effort on RTL verification (28%) and initial design specification (24%), followed by RTL entry (15%). The remaining time is divided among timing analysis, software integration, and in-lab debug activities, reflecting the broad scope of FPGA development.
Figure 7 (b): FPGA Project Time Allocation by Task (Tabulated View)
Safety and Standards Compliance
Most respondents (64.29%) indicated that they do not currently follow any formal safety-critical standard. Among those that do, the most common frameworks are DO-254 for aerospace applications and ISO-26262 for automotive. These results show that while regulated sectors are steadily adopting certification-driven design flows, most FPGA developments still operate outside formal compliance frameworks, focusing instead on reliability through internal process discipline and project-specific validation.
Among respondents engaged in aerospace and safety-related system design, the adoption of formal frameworks remains limited but measurable. As shown in Figure 8, roughly half of respondents working in safety-critical environments apply DO-254 compliance at some level, most commonly Level A, the most rigorous certification category for airborne electronic hardware. Levels B-D remain less common, reflecting selective use of formal certification within specialised engineering groups.
Figure 8: FPGA DO-254 Compliance Levels for Aerospace Applications
Half of UK respondents reported no adherence to formal safety-critical standards, while those working in regulated domains most frequently applied DO-254 Level A for aerospace projects.
Meanwhile, Figure 9 shows that only a small number of respondents currently follow IEC 61508 or ISO 26262 processes for industrial and automotive projects, reflecting the early adoption of these standards beyond aerospace. This diversity of practice underscores the need for shared training, mentoring, and guidance to help UK teams apply consistent verification and compliance methodologies across different sectors.
Figure 9 (a): FPGA Safety-Standard Adoption Across Industrial and Automotive Sectors
Only a minority of respondents apply IEC 61508 or ISO 26262 compliance, indicating that formal safety processes remain in early stages beyond aerospace.
Figure 9 (b): Combined Safety-Standard Adoption (Tabulated View)
Skills, Training, and Resourcing
The survey showed that 64.29% of participants maintain their FPGA expertise internally, primarily through on-the-job experience and continuous self-learning. Meanwhile, 35.71% set aside time for formal team training, while a smaller proportion (14.29%) reported adding new permanent staff or bringing in external FPGA specialists when specific projects demand specialised knowledge. As illustrated in Figure 10, most respondents rely on internal skill development, with formal training and targeted recruitment used selectively to fill capability gaps.
These findings align closely with DESN’s initiatives to strengthen technical capability within the UK semiconductor community. Planned mentoring programmes, Women-in-Tech initiatives, and free FPGA training opportunities continue to support professional development and diversity within the field. Together, these efforts aim to ensure a sustainable pipeline of skilled engineers capable of meeting the evolving demands of the UK’s semiconductor and embedded-systems ecosystem.
Figure 10: FPGA Skills Development and Training Approaches among UK Respondents
Most respondents maintain expertise internally through self-learning, with formal training and selective hiring supporting advanced or project-specific requirements.
Key Takeaways
The results of the DESN FPGA Usage Survey reveal a community that is both resilient and forward-looking. UK respondents demonstrate strong technical capability despite constrained resources and growing design complexity. Verification and debugging remain the most time-intensive phases of development, while toolchain integration and skills retention continue to present significant challenges.
Adoption of advanced design and verification methodologies, including formal verification, functional coverage, and continuous integration, is gradually increasing, though progress remains uneven across the industry. These findings highlight the importance of collaboration through networks such as DESN and TechWorks, which enable shared learning, promote best practice, and help strengthen the UK’s collective semiconductor design capability.
Looking Ahead
The FPGA Usage Survey reaffirms that the UK’s programmable logic community is both innovative and globally competitive, yet continues to face shared challenges that require coordinated action. Through ongoing partnerships between TechWorks DESN and Alpinum Consulting, the ecosystem is making measurable progress by delivering training workshops, mentoring programmes, and technical forums focused on verification, design methodology, and skills development.
As DESN expands its specialist groups and training initiatives in 2026, the survey findings will help shape its priorities for supporting design and verification excellence across the UK’s semiconductor and embedded-systems sector.
Get Involved
If you would like to contribute to future surveys, join DESN working groups, or participate in upcoming FPGA training and mentoring activities. For collaboration or event partnership opportunities, visit Alpinum Consulting or contact the team directly.
About DESN and Alpinum Consulting
DESN, the TechWorks community for Semiconductor System Design, represents engineers and organisations working in semiconductor, embedded-system, and verification domains. It aims to promote collaboration, drive innovation, and strengthen the UK’s semiconductor ecosystem through knowledge sharing and industry alignment.
Alpinum Consulting partners with TechWorks and leading technology companies to provide verification expertise, ecosystem leadership, and specialist training that enable clients to grow and succeed in an evolving semiconductor landscape.
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